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M2L31YIDAE
The NuMicro® M2L31YIDAE is based on Arm® Cortex®-M23 core at Armv8-M architecture. It runs up to 72 MHz and features 512 Kbytes ReRAM, 168 Kbytes SRAM, 1.71V to 3.6V operating voltage, -40°C to 105°C wide operating temperature, QFN48 package, and excellent high immunity characteristics by 4 kV ESD HBM and 4.4 kV EFT.
In Normal Run mode 60 μA/MHz at 72 MHz, It supports 3 additional power-down levels, including Normal Power-down, Standby Power-down, and Deep Power-down mode. In the Normal Power-down mode, MIRC, LIRC and LXT can be operated to shorten the stable time of high precision sensors. in additional, features Auto-operation mode in low power domain to proceed sensor data through low power serial interface without interrupting CPU.
For the development tool, NK-M2L31KI NuMaker evaluation board and Nu-Link debugger are powerful tools for product evaluation and development. It supports IDEs provided by third parties, such as Keil MDK, IAR EWARM and NuEclipse IDE with GNU GCC compiler.
Key Features:
• | Operating Characteristics | |
- | Voltage range: 1.71V ~ 3.6V | |
- | Temperature range: -40°C ~ 105°C | |
• | Core | |
- | Arm Cortex-M23 core running up to 72 MHz | |
- | 32-bit hardware multiplier/divider | |
• | Memory | |
- | 512 KB Resistive RAM (ReRAM) memory without the need for an erase cycle to save read and write time | |
- | 168 KB SRAM with 40KB parity check | |
- | Independent 8 KB Low Power SRAM | |
- | 8 KB LDROM | |
- | 4 eXecute-Only-Memory (XOM) regions | |
- | 4 Memory Protection Unit (MPU) memory regions | |
• | Supports program update by | |
- | ISP ( In-System Programming ) | |
- | ICP ( In-Circuit Programming ) | |
- | IAP ( In-Application Programming) | |
• | Clocks | |
- | 4 to 32 MHz crystal oscillator | |
- | 32.768 kHz crystal oscillator for RTC | |
- | Internal 12 MHz RC oscillator with ± 2% deviation at -40~105 ℃ | |
- | Internal 48 MHz RC oscillator with ±2.5% deviation at -40~105 ℃ | |
- | Internal 1~8 MHz MIRC with ±10% deviation at -40~105 ℃ | |
- | Internal 32 kHz RC oscillator±10% deviation | |
- | Internal PLL up to 144 MHz | |
• | Low Power Consumption | |
- | Normal run: 60 μA/MHz at 72 MHz | |
- | Idle mode: 33 μA/MHz at 25°C/3.0V, all peripherals disabled condition | |
- | NPD w/o power gating (NPD2 mode): 55 μA, at 25°C/3.0V | |
- | NPD w/ power gating (NPD4 mode): 9 μA, at 25°C/3.0V | |
- | SPD w/ 40KB SRAM retention: 1.7 μA, at 25°C/3.0V | |
- | DPD: 0.54 μA at 25°C/3.0V, RTC and LXT disabled | |
• | Timers | |
- | 4 sets of 32-bit timers, supporting up to 1 independent PWM output | |
- | 12-ch Enhanced PWM with twelve 16-bit counters, up to 144 MHz for timer clock source | |
- | 12-ch PWM with six 16-bit timers, 72 MHz for timer clock source | |
- | Two 24-bit Low Power Timers | |
- | Two Tick Timers | |
- | One 24-bit count-down SysTick timer | |
- | One watchdog timer | |
- | One window watchdog timer | |
• | PDMA | |
- | 16 channels of Peripheral DMA Controller | |
• | RTC and VBAT | |
- | Independent VBAT power pin for RTC | |
• | Control Interfaces | |
- | Voltage Adjustable Interface (VAI) | |
- | 2 Enhanced Quadrature Encoder Interfaces (EQEI) | |
- | 2 input Enhanced Input Capture timers (ECAP) | |
• | Cryptography Accelerator | |
- | Cyclic Redundancy Calculation Unit | |
- | AES encryption with 128/192/256-bit key | |
- | True random number generator (TRNG) | |
- | Pseudo random number generator (PRNG) | |
- | Three Tamper pins | |
• | Analog | |
- | Built-in internal reference voltage | |
- | Built-in temperature sensor | |
- | One 12-bit, 16-ch 3.42 MSPS SAR ADC | |
- | 2 sets 12-bit, 1 MSPS DAC with buffer | |
- | 3 sets rail-to-rail comparators with 6-bit DAC function | |
- | 3 sets of OP Amplifiers | |
- | 12-ch touch keys with single-scan or programmable periodic key-scans with 5V tolerance | |
• | Communication interfaces | |
- | 8 sets of UART interfaces | |
- | 1 Low Power UART interface | |
- | 4 sets of SPI/I²S (36/18 MHz) | |
- | 2 sets of USCI interface (UART / SPI / I²C) | |
- | 4 sets of I²C interfaces | |
- | 1 Low Power I²C interfaces (400 kbps) | |
- | 1 Low Power SPI interface (12/6 MHz) | |
- | 1 Quad Serial Peripheral Interface (QSPI) | |
- | External Bus Interface (EBI) | |
- | 2 sets of CAN FD controllers | |
- | Supports USB 2.0 full speed OTG/Host/Device controller with maximum 1024 bytes’ buffer size | |
- | Compliant with Type-C (Rev.2.1) and Power Delivery (Rev. 3.0) specification | |
• | IEC-60730 Class B compliance | |
• | Evaluation Board | |
- | NuMaker-M2L31KI |