This is because the internal USB PHY clock source in the NUC442/472 series is an external crystal oscillator. In view of the USB PHY hardware design, this clock source has to work properly to detect signals on the USB bus. However, when the USB Device receives the Suspend signal from the Host, if the NUC442/472 series enters Power-down mode, to save power in the Power-down mode, an external crystal oscillator will be turned off, causing USB PHY not working properly. Also, the signal on the USB bus cannot be detected, and thus the device cannot be woken up by the Host.

Accordingly, after the Host sends the Suspend signal, the Host wakes up the NUC442/472 series application and the NUC442/472 series can only enter Idle mode, instead of Power-down mode.

The following shows the block diagram of high-speed external clock source generator and USB Device clock source (Phase-locked loop PLL 2 generator) in the NUC442/NUC472 series.

Also refer to the following PLL2CLKEN (CLK_PLL2CTL[8]) register description.

Products:	Microcontrollers ,Arm Cortex-M4 MCUs ,NUC442/472 Series
Applications:
Function:	Peripherals,Clock Control,HXT,PLL,Connectivity,USB,System Operation,Power-down

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Suspend signal. Why can’t the USB Device in the NUC442/472 series be woken up by the Host after entering Power-down mode? Issue Date：2016-08-18

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